The present invention relates to a method for driving a plasma display panel (PDP).
Recently, as a display device becomes large in size, thickness of the display device is desired to be thin. Therefore, various types of display devices of thin thickness are provided. As one of the display devices, an ACPDP is known.
A conventional ACPDP comprises a plurality of column electrodes (address electrodes), and a plurality of row electrodes (sustaining electrodes) formed in pairs and disposed to intersect the column electrodes. A pair of row electrodes form one row (one scanning line) of an image. The column electrodes and the row electrodes are covered by dielectric layers respectively, at a discharge space. At the intersection of each of the column electrodes and each pair of row electrodes, a discharge cell (pixel) is formed.
As a method for displaying an image on the PDP by controlling a tone of the image, each frame (field) of a video signal is divided into N pieces of sub-frames (sub-fields), and each sub-frame (sub-field) emits the light for a time length corresponding to a weight applied to each bit of n-bit pixel data (so-called sub-frame method).
In the method, if a pixel data for each pixel has 8 bits as shown in FIG. 16, each frame is divided into eight sub-frames, SF0, SF1, SF2, . . . SF7. The sub-frames SF0 to SF7 emit the light by sustaining discharge at 1 time, 2 times, 4 times, 8 times, 16 times, 32 times, 64 times and 128 times, respectively, in order.
Each sub-frame comprises an all at once reset period, address period, discharge sustaining period and wall charge erasing period. Driving pulses are applied to all electrodes as shown in FIG. 17, as described hereinafter.
First, a reset pulse RPx of negative polarity is applied to each of the row electrodes as sustain electrodes X1-Xj. At the same time, a reset pulse RPy of positive polarity is applied to each of the row electrodes Y1-Yj. Thus, all of the row electrodes in pairs in the PDP are excited to discharge, thereby producing charged particles in the discharge space at the discharge cell. Thereafter, when the discharge is finished, wall charge is formed and accumulated on the discharge cell (An all at once reset period).
Then, pixel data pulse DP1-DPk corresponding to the pixel data for every row are applied to the column electrodes A1-Ak. At that time, scanning pulses (selecting and erasing pulses) SP are applied to the row electrodes Y1-Yj in order in synchronism with the timings of the data pulse DP1-DPk.
At that time, only in the discharge cell (unlighted pixel, unlighted cell) to which the scanning pulse SP and the pixel data pulse DP are simultaneously applied, the discharge occurs, so that the wall charge produced at the all at once reset period is erased.
On the other hand, in the discharge cell (lighted pixel, lighted cell) to which only the scanning pulse SP is applied, the discharge does not occur. Thus, the wall charge produced at the all at once reset period is held. Namely, a predetermined amount of the wall charge is selectively erased in accordance with the display data (An address period).
Next, a discharge sustaining pulse IPx of positive polarity is applied to the row electrodes X1-Xj, and a discharge sustaining pulse IPy of positive polarity is applied to the row electrodes Y1-Yj at offset timing from the discharge row pulses IPx.
During the discharge sustaining pulses are continuously applied, the discharge cell which holds the wall charge sustains the discharge and emission of light (A discharge sustaining period).
Thus, the image is displayed by repeating the display cycle (one sub-frame) comprising the all at once reset period, address period, discharge sustaining period and wall charge erasing period.
As above described, in the selecting and erasing address method, it is necessary to provide the reset period at the start of the sub-frame so that all discharge cells are reset-discharged to produce the wall charge in each discharge cell. In the case of display data of 8 bits, for example, at least reset discharges of eight times if necessary. The reset discharge is comparatively strong discharge. In addition, since the reset discharge has not relation to the tone of the display, the discharge causes the contrast of the display to reduce.
An object of the present invention is to provide a method for driving a plasma display panel which may improve the contrast of the display.
According to the present invention, there is provided a method for driving a plasma display panel wherein one frame of a video signal is divided into a plurality of sub-frames, each of the sub-frames is composed by an address period for selecting light emitting pixels or light non-emitting pixels at every scanning line in accordance with a pixel data, and a discharge sustaining period for causing a light emitting pixel to emit at a number of times in accordance with weighting of each sub-frame.
The method comprises disposing adjacently a plurality of sub-frames to form at least one sub-frame block, and providing a reset period in a first sub-frame of the sub-frame block so as to initialize all pixels prior to the address period.
The method further comprises forming a wall charge in each of the all pixels in the reset period, and selectively erasing the wall charge in each pixel in one of the address periods of the sub-frame block in accordance with the pixel data.
The method further comprises forming a wall charge in each of the all pixels in the reset period, thereafter erasing the wall charge in all pixels, selectively forming a wall charge of each pixel in each address period of the sub-frame block in accordance with the pixel data, and providing a whole surface erasing period after each discharge sustaining period in the sub-frame block, for erasing wall charges in emitting pixel.
A first sub-frame in the sub-frame block comprises a lightly weighted sub-frame, a sub-frame following the first sub-frame comprises a heavily weighted sub-frame.
A first sub-frame in the sub-frame block comprises a most lightly weighted divided sub-frame in a divided sub-frame group which is formed by dividing a plurality of heavily weighted sub-frames including a most heavily weighted sub-frame, a sub-frame following the first sub-frame in the sub-frame block includes one of most heavily weighted sub-frames.
In an aspect of the invention, at least two sub-frames include at least two divided sub-frames which are formed by dividing a most heavily weighted sub-frame.
The pixel data comprises n bits, the one frame is divided into n sub-frames, sub-frames in the sub-frame block are arranged in such an arrangement that the first is a first sub-frame in which the number of times of light emitting in the discharge sustaining period is Lxc2x72k, the second is a second sub-frame in which the number of times of light emitting in the discharge sustaining period is Lxc2x7(2m+kxe2x88x922k) (0xe2x89xa6k less than m less than n, m+k less than n, 1xe2x89xa6L), the first sub-frame is selectively caused to be an emitting state when luminance level is less than 2m, and the first and second sub-frames are caused to be emitting state when luminance level is more than 2m.
These and other objects and features of the present invention will become more apparent from the following detailed description with reference to the accompanying drawings.